Lab for High Performance Computing SERC, Indian Institute of Science
Home | People | Research | Awards/Honours | Publications | Lab Resources | Gallery | Contact Info | Sponsored Research
Tech. Reports | Conferences / Journals | Theses / Project Reports

Study of Cache and TLB Performance in a DVSM System

1st Workshop on Software Distributed Shared Memory (WSSM-99)
Rhodes, Greece, June 1999

Authors

  1. V. Sricharan, Department of Computer Science and Automation
  2. R. Govindarajan, Supercomputer Education and Research Centre; Department of Computer Science and Automation

Abstract

Distributed Virtual Shared Memory (DVSM) systems provide shared memory abstraction in software on distributed memory systems. These systems rely on a set of library routines, called DSM layer, to implement shared memory abstraction, maintain coherence of shared data and provide synchronization primitives. Due to the various services provided by the DSM layer to the application, there is a substantial interaction between the two layers. Studies in the past have alluded to the possible performance degradation of system caches in DVSM systems due to this interaction but no study was conducted to measure the extent of interaction and quantitatively analyze its effect on the cache or TLB performance.

We developed a detailed classification of the memory references that are made by programs executing in a DVSM system and identified metrics for measuring the effect of interaction between the application and DSM layers on cache or TLB performance. We performed a detailed trace-driven simulation of various cache and TLB configurations on a set of SPLASH-2 benchmarks. Our studies revealed that the impact of interaction between the application and DSM layers on the performance of cache or TLB is small.

Download

Full Text