Publications: Conferences/Journals

A list of papers by Prof. R. Govindarajan can be found on his website.

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In Conference Proceedings

2018

HAShCache: Heterogeneity-Aware Shared DRAMCache for Integrated Heterogeneous Systems

Adarsh Patil, R. Govindarajan
High Performance and Embedded Architecture and Compilation, HiPEAC 2018,
Manchester, UK, January 22--24, 2018
(full text)

2017

Taming Warp Divergence

Jayvant Anantpur, R. Govindarajan
Proceedings of the 2017 International Symposium on Code Generation and Optimization, CGO 2017,
Austin,TX, USA, February 04--08, 2017
(full text)

2016

MicroRefresh: Minimizing Refresh Overhead in DRAM Caches

Nagendra Gulur, R. Govindarajan
Proceedings of the Second International Symposium on Memory Systems, MEMSYS 2016,
Alexandria, VA, USA, October 03--06, 2016
(full text)

2015

PRO: Progress Aware GPU Warp Scheduling Algorithm

Jayvant Anantpur, R. Govindarajan
IEEE International Parallel and Distributed Processing Symposium, IPDPS 2015,
Hyderabad, India, May 25--29, 2015
(full text)

Approximating flow-sensitive pointer analysis using frequent itemset mining

Vaivaswatha Nagaraj, R. Govindarajan
Proceedings of the 13th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2015,
San Francisco, CA, USA, February 07--11, 2015
(full text)

A Comprehensive Analytical Performance Model of DRAM Caches

Nagendra Gulur, R. Govindarajan
Proceedings of the 6th ACM/SPEC International Conference on Performance Engineering, ICPE2015,
Austin, TX, USA, February 01--04, 2015
(full text)

2014

Bi-Modal DRAM Cache: Improving Hit Rate, Hit Latency and Bandwidth

Nagendra Dwarakanath Gulur, R. Govindarajan
47th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2014,
Cambridge, United Kingdom, December 13--17, 2014
(full text)

ANATOMY: an analytical model of memory system performance

Nagendra Dwarakanath Gulur, R. Govindarajan
The 2014 ACM international conference on Measurement and modeling of computer systems,
Austin, TX, USA, June 16--20, 2014
(full text)

Taming Control Divergence in GPUs through Control Flow Linearization

Jayvant Anantpur, R. Govindarajan
Compiler Construction - 23rd International Conference, CC 2014, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2014,
Grenoble, France, April 5--13, 2014
(full text)

Fluidic Kernels: Cooperative Execution of OpenCL Programs on Multiple Heterogeneous Devices

Prasanna Pandit, R. Govindarajan
12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 14,
Orlando, FL, USA, February 15--19, 2014
(full text)

2013

Parallel flow-sensitive pointer analysis by graph-rewriting

Vaivaswatha Nagaraj, R. Govindarajan
Proceedings of the 22nd international conference on Parallel architectures and compilation techniques,
Edinburgh, Scotland, September 7--11, 2013
(full text)

Improving GPGPU Concurrency with Elastic Kernels

Sreepathi Pai, Matthew J. Thazhuthaveetil, R. Govindarajan
Proceedings of the 18th International Conference on Architectural Support for Programming Languages and Operating Systems,
Houston, USA, March 16--20, 2013
(full text)

Runtime Dependence Computation and Execution of Loops on Heterogeneous Systems

Jayvant Anantpur, R. Govindarajan
Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, 2013,
Shenzhen, China, February 23--27, 2013
(full text)

2012

Fast and Efficient Automatic Memory Management for GPUs using Compiler-Assisted Runtime Coherence Scheme

Sreepathi Pai, R. Govindarajan, Matthew J. Thazhuthaveetil
Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques,
Minneapolis, USA, September 19--23, 2012
(full text)

CUDA-For-Clusters : A System for Efficient Execution of CUDA Kernels on Multi-Core Clusters

Raghu Prabhakar, R. Govindarajan
Euro-Par 2012 Parallel Processing,
Rhodes Island, Greece, August 27--31, 2012
(full text)

Multiple Sub-Row Buffers in DRAM: Unlocking Performance and Energy Improvement Opportunities

Nagendra Dwarakanath Gulur, R. Govindarajan
International conference on Supercomputing 2012,
Venice, Italy, June 25--29 2012
(full text)

Probabilistic Shared Cache Management (PriSM)

R. Manikantan, Kaushik Rajan, R. Govindarajan
Proceedings of the 39th Annual International Symposium on Computer Architecture,
Portland, OR, USA, June 9--13, 2012
(full text)

Reconciling Transactional Conflicts with Compilers Help

Sandya Mannarswamy, R. Govindarajan
Proceedings of the Tenth International Symposium on Code Generation and Optimization 2012,
San Jose, CA, USA, April 01--04, 2012
(full text)

2011

Row-Buffer Reorganization: Simultaneously Improving Performance and Reducing Energy in DRAMs

Nagendra Dwarakanath Gulur, R. Govindarajan
International Conference on Parallel Architectures and Compilation Techniques 2011,
Galveston, TX, USA, October 10--14, 2011
(full text)

Making STMs Cache Friendly with Compiler Transformations

Sandya Mannarswamy, R. Govindarajan
International Conference on Parallel Architectures and Compilation Techniques (PACT), 2011,
Galvaston, Texas, USA, October 10--14, 2011
(full text)

Automatic Compilation of MATLAB Programs for Synergistic Execution on Heterogeneous Processors

Ashwin Prasad, Jayvant Anantpur, R. Govindarajan
The 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation,
San Jose, California, June 4--8, 2011
(full text)

Variable Granularity Access Tracking Scheme for Improving the Performance of Software Transactional Memory

Sandya Mannarswamy, R. Govindarajan
The 25th IEEE International Parallel & Distributed Processing Symposium,
Anchorage, Alaska, USA, May 16--20, 2011
(full text)

Prioritizing Constraint Evaluation for Efficient Points-to Analysis

Rupesh Nasre, R. Govindarajan
The IEEE/ACM International Symposium on Code Generation Optimization 2011,
Chamonix, France, April 02--06, 2011
(full text)

NUcache: An Efficient Multicore Cache Organization Based on Next-Use Distance

R. Manikantan, Kaushik Rajan, R. Govindarajan
Proceedings of the 17th International Conference on High Performance Computer Architecture,
San Antonio, Texas, February 12--16, 2011
(full text)

Extended Histories - Improving Regularity and Performance in Correlation Prefetchers

R. Manikantan, R. Govindarajan, Kaushik Rajan
Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers,
Heraklion, Crete, Greece, January 22--26, 2011
(full text)

2010

Handling Conflicts with Compiler's help in Software Transactional Memory Systems

Sandya Mannaraswamy, R. Govindarajan
Proceedings of the 39th International Conference on Parallel Processing (ICPP-2010),
San Diego, CA, September 13--16, 2010
(full text)

Points-to Analysis as a System of Linear Equations

Rupesh Nasre, R. Govindarajan
The 17th International Static Analysis Symposium,
Perpignan, France, September 14--16, 2010
(full text)

Compiler Aided Selective Lock Assignment for Improving the Performance of Software Transactional Memory

Sandya Mannarswamy, Dhruva R. Chakrabarti, Kaushik Rajan, Sujoy Saraswati
Proceedings of the 15th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming (PPoPP-2010),
Bangalore, India, January 9--14, 2010
(full text)

PLASMA: Portable Programming for SIMD Heterogeneous Accelerators

Sreepathi Pai, R. Govindarajan, M. J. Thazhuthaveetil
Workshop on Language, Compiler, and Architecture Support for GPGPU, held in conjunction with HPCA/PPoPP 2010,
Bangalore, India, January 9, 2010
(full text)

2009

Scalable Context-Sensitive Points-To Analysis using Multi-Dimensional Bloom Filters.

Rupesh Nasre, Kaushik Rajan, R. Govindarajan, Uday P. Khedker
Proceedings of the Seventh Asian Symposium on Programming Languages and Systems (APLAS 2009),
Seoul, South Korea, December 14--16, 2009
(full text)

Reducing Buffer Requirements in Core Routers using Dynamic Buffering

B.C. Girish, R. Govindarajan
Proceedings of the 18th International Conference on Computer Communications and Networks (ICCCN 2009),
San Francisco, USA, September 2009
(full text)

Region Based Structure Layout Optimization by Selective Data Copying

Sandya Mannarswamy, R. Govindarajan, Rishi Surendran
Proceedings of the 18th International Conference on Parallel Architectures and Compilation Techniques (PACT-2009),
Raleigh, USA, August, 2009
(full text)

Synergistic Execution of Stream Programs on Multicores with Accelerators

Abhishek Udupa, R. Govindarajan, M. J. Thazhuthaveetil
Proceedings of the ACM SIGPLAN/SIGBED 2009 Conference on Languages, Compilers and Tools for Embedded Systems (LCTES 2009),
Dublin, Ireland, June 2009
(full text)

Software Pipelined Execution of Stream Programs on GPUs

Abhishek Udupa, R. Govindarajan, M. J. Thazhuthaveetil
Proceedings of the International Symposium on Code Generation and Optimization (CGO-09),
Seattle, WA, USA, March 2009
(full text)

2008

Improving Performance of Digest Caches in Network Processors

Girish B C, R. Govindarajan
International Conference on High Performance Computing,
Bangalore, India, December 17--20, 2008
(full text)

Online Unsupervised Pattern Discovery in Speech using Parallelization

Mrugesh R. Gajjar, R. Govindarajan, T. V. Sreenivas
Proceedings of Interspeech 2008,
Brisbane, Australia, September 22--26, 2008
(full text)

A Systematic Approach to Synthesis of Verification Test-suites for Modular SoC Designs

Sudhakar Surendran, Rubin Parekhji, R. Govindarajan
Proceedings of the 21st Annual IEEE SoC Conference (SoCC-08),
Newport Beach, CA, USA, September 2008
(full text)

Focused Prefetching: Performance Oriented Prefetching Based on Commit Stalls

R. Manikantan, R. Govindarajan
International Conference on Supercomputing (ICS 2008),
Island of Kos, Greece, June 7--12, 2008
(full text)

Comprehensive Path-sensitive Dataflow Analysis

Aditya Thakur, R. Govindarajan
International Symposium on Code Generation and Optimization (CGO),
Boston, Massachusetts, April 6--9, 2008
(full text)

2007

Compiler-Directed Dynamic Voltage Scaling using Program Phases

Shyam Krishnaswamy, R. Govindarajan
Proceedings of the 14th Annual International Conference on High Performance Computing (HiPC 07),
Goa, India, December 18--21, 2007
(full text)

Limits of Data-Level Parallelism

Sreepathi Pai, R. Govindarajan, M. J. Thazhuthaveetil
Poster session at the Fourteenth International Conference on High Performance Computing (HiPC 2007),
Goa, India, December 18--21, 2007
(full text)

Emulating Optimal Replacement with a Shepherd Cache

Kaushik Rajan, R. Govindarajan
Proceedings of the International Symposium on Microarchitecture (MICRO-40),
Chicago, Illinois, USA, December 1--5, 2007
(full text)

Dynamic Cache Placement with Two-level Mapping to Reduce Conflict Misses

Kaushik Rajan, R. Govindarajan, Bharadwaj Amrutur
Poster session at the Sixteenth International Conference on Parallel Architectures and Compilation Techniques (PACT-2007),
Brasov, Romania, September 15--19, 2007
(full text)

A Scalable Low Power Store Queue For Large Instruction Window Superscalar processors

Rajesh Vivekanandham, R. Govindarajan
Poster session at the Sixteenth International Conference on Parallel Architectures and Compilation Techniques (PACT-2007),
Brasov, Romania, September 15--19, 2007
(full text)

A Petri Net Model for Evaluating Packet Buffering Strategies in a Network Processor

Girish BC, R. Govindarajan
Proceedings of the 4th International Conference on the Quantitative Evaluation of SysTems (QEST) 2007,
Edinburgh, Scotland, September 16--19, 2007
(full text)

An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures

K. Shyam, R. Govindarajan
Proceedings of the 16th International Conference on Compiler Construction (CC-2007),
Braga, Portugal, March 26--30, 2007
(full text)

Register Allocation and Optimal Spill Code Scheduling in Software Pipelined Loops using ILP formulation

Santosh G. Nagarakatte, R. Govindarajan
Proceedings of the 16th International Conference on Compiler Construction (CC-2007),
Braga, Portugal, March 26--30, 2007
(full text)

Packet Reordering in Network Processors

S. Govind, R. Govindarajan, Joy Kuri
Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS-07),
Long Beach, CA, USA, March 26--30, 2007
(full text)

MODLEX: A Multi-Objective Data Layout Exploration Framework for Embedded SoC

T. S. Rajesh Kumar, C. P. Ravi Kumar, R. Govindarajan
Proceedings of the 12th Asia and South Pacific Design Automation Conference (ASP-DAC-07),
Yokohama, Japan, January 23--26, 2007
(full text)

MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip

T. S. Rajesh Kumar, C. P. Ravi Kumar, R. Govindarajan
Proceedings of the International Conference on VLSI Design (VLSI-07),
Bangalore, India, January 2007
(full text)

2006

Two-level Mapping based Cache Index Selection for Packet Forwarding Engines

Kaushik Rajan, R. Govindarajan
Proceedings of the Fifteenth International Conference on Parallel Architectures and Compilation Techniques (PACT-06),
Seattle, Washington, USA, September 16--20, 2006
(full text)

A Scalable Low Power Issue Queue for Large Instruction Window Processors

Rajesh Vivekanandham, Bharadwaj Amrutur, R. Govindarajan
Proceedings of the International Conference on Supercomputing (ICS 06),
Cairns, Queensland, Australia, June 28--30, 2006
(full text)

Exploiting Programmable Network Interfaces for Parallel Query Execution in Workstation Clusters

V. Santhosh Kumar, M. J. Thazhuthaveetil, R. Govindarajan
Proceedings of the International Parallel & Distributed Processing Symposium (IPDPS 06),
Rhodes Island, Greece, April 2006
(full text)

2005

Offloading Bloom Filter Operations to Network Processor for Parallel Query Processing in Cluster of Workstations

V. Santhosh Kumar, M. J. Thazhuthaveetil, R. Govindarajan
Proceedings of the International Conference on High Performance Computing (HiPC-05),
Goa, India, December 2005
(full text)

Performance Modeling and Architectural Exploration of Network Processors

Govind S., R. Govindarajan
Proceedings of the International Conference on Quantitative Evaluation of SysTems (QEST-05),
Torino, Italy, September 2005
(full text)

Heterogeneously Segmented Cache Architecture for a Packet Forwarding Engine

Kaushik Rajan, R. Govindarajan
Proceedings of the International Conference on Supercomputing (ICS-05),
Cambridge, Massachussets, USA, June 20--22, 2005
(full text)

2003

An Efficient Web Cache Replacement Policy

Radhika Sharma, R. Govindarajan
Proceedings of the High Performance Computing (HiPC-03),
Hyderabad, India, December 2003
(full text)

Unified Instruction Reordering and Algebraic Transformations for Minimum Cost Offset Assignment

V V N S Sarvani, R. Govindarajan
Proceedings of the 7th International Workshop on Software and Compilers for Embedded Systems (SCOPES-2003),
Vienna, Austria, September 2003
(full text)

Exploiting Java-ILP on a Simultaneous Multi-Trace Instruction Issue (SMTI) Processor

R. Achutharaman, R. Govindarajan, G. Hariprakash, Amos R. Omondi
Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS-03),
Nice, France, April 2003
(full text)

Optimal Code and Data Layout in Embedded Systems

T. S. Rajesh Kumar, R. Govindarajan, C. P. Ravi Kumar
Proceedings of the International Conference on VLSI Systems (VLSI-03),
New Delhi, India, January 2003
(full text)

2002

Dynamic Path Profile Aided Recompilation in a JAVA Just-In-Time Compiler

R. Vinodh Kumar, B. Lakshmi Narayanan, R. Govindarajan
Proceedings of the High Performance Computing (HiPC-02),
Bangalore, India, December 2002
(full text)

Unified Instruction Reordering and Algebraic Transformations for Minimum Cost Offset Assignment

V V N S Sarvani, R. Govindarajan
Poster session at ACM SIGPLAN 2002 International Conference on Programming Languages Design and Implementation (PLDI-2002),
Berlin, Germany, June 17--19, 2002
(full text)

2001

Hidden Costs in Avoiding False Sharing in Software DSMs

K.V. Manjunath, R. Govindarajan
Proceedings of the International Conference on High Performance Computing (HiPC-01),
Hyderabad, India, December 2001
(full text)

Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Reconfigurable Encoding

Subash Chandar G., M. Mehendale, R. Govindarajan
Proceedings of the International Conference on Computer Aided Design (ICCAD-2001),
San Jose, November 2001
(full text)

1999

Resource Usage Modelling for Software Pipelining

V. Janaki Ramanan, R. Govindarajan
Proceedings of the 6th International Conference on High Performance Computing (HiPC-99),
Calcutta, December 1999
(full text)

Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors

Madhavi Gopal Valluri, R. Govindarajan
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT-99),
Newport Beach, California, USA, October 12--16, 1999
(full text)

Resource Usage Models for Instruction Scheduling: Two New Models and a Classification

V. Janaki Ramanan, R. Govindarajan
Proceedings of the International Conference on Supercomputing (ICS-99),
Rhodes, Greece, June 20--25, 1999
(full text)

CAS-DSM: A Compiler Assisted Software Distributed Shared Memory

Manoj N. P., R. Govindarajan
Proceedings of the 1st Workshop on Software Distributed Shared Memory (WSSM-99),
Rhodes, Greece, June 1999
(full text)

Study of Cache and TLB Performance in a DVSM System

V. Sricharan, R. Govindarajan
1st Workshop on Software Distributed Shared Memory (WSSM-99),
Rhodes, Greece, June 1999
(full text)

1998

Modulo-Variable Expansion Sensitive Scheduling

Madhavi G. Valluri, R. Govindarajan
Proceedings of the 5th International Conference on High-Performance Computing (HiPC-98),
Chennai, India, December 1998
(full text)

An Enhanced Co-Scheduling Method using Reduced MS-State Diagram

R. Govindarajan, N. S. S. Narasimha Rao, E. R. Altman, G. R. Gao
Proceedings of the Merged 12th International Parallel Processing Symposium and 9th International Symposium on Parallel and Distributed Systems (IPPS 98),
Orlando, Florida, USA, April 1998
(full text)

1997

Distributed Shared Memory on IBM SP2

S. Ramesh, R. Lakshmi, R. Govindarajan
International Conference on Parallel and Distributed Systems (ICPADS-97),
Seoul, Korea, December 1997
(full text)

In Journals

2017

HAShCache: Heterogeneity-Aware Shared DRAMCache for Integrated Heterogeneous Systems

Adarsh Patil, R. Govindarajan
ACM Transactions on Architecture and Code Optimization (TACO),
Volume 14 Issue 4, December 2017 Article No. 51, December 01--03, 2017
(full text)

2011

Performance Oriented Prefetching Enhancements Using Commit Stalls

R. Manikantan, R. Govindarajan
Journal of Instruction-Level Parallelism 2011,
vol 13, pp. 1--28, March, 2011
(full text)

2009

A Novel Cache Architecture and Placement Framework for Packet Forwarding Engines

Kaushik Rajan, R. Govindarajan
IEEE Transactions on Computers,
vol. 58, no. 8, pp. 1009--1025, August 2009
(full text)

2008

Impact of message compression on the scalability of an atmospheric modeling application on clusters

V. Santhosh Kumar, R. Nanjundiah, M. J. Thazhuthaveetil, R. Govindarajan
Parallel Computing,
vol. 34, no. 1, pp.1--16, January 2008
(full text)

2007

FEADS: A Framework for Exploring the Application Design Space on Network Processors

Rajani Pai, R. Govindarajan
International Journal of Parallel Programming,
vol 35, no. 1, pp. 1--31, February 2007
(full text)

2006

Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Reconfigurable Encoding

G. Subash Chandar, M. Mehendale, R. Govindarajan
Journal of VLSI Signal Processing,
vol. 44, pp. 245--267, July 2006
(full text)

2004

Performance Analysis of Methods that Overcome False Sharing Effects in Software DSMs

K. V. Manjunath, R. Govindarajan
Journal of Parallel and Distributed Computing,
vol. 64, no. 8, pp. 887--907, August 2004
(full text)

CAS-DSM: A Compiler Assisted Software Distributed Shared Memory

Manoj N. P., K. V. Manjunath, R. Govindarajan
International Journal of Parallel Programming,
vol. 32, no. 2, pp. 77--122, April 2004
(full text)

2000

A Vectorizing Compiler for Multimedia Extension

N. Sreraman, R. Govindarajan
International Journal of Parallel Programming,
vol. 28, no. 4, pp. 363--400, August 2000
(full text)

Enhanced Co-Scheduling: A Software Pipelining Method using Modulo-Scheduled Pipeline Theory

R. Govindarajan, N. S. S. Narasimha Rao, E. R. Altman, G. R. Gao
International Journal of Parallel Programming,
vol. 28, no. 1, pp. 1--46, February 2000
(full text)