Workshop and Tutorial Program

Workshops

Saturday, January 9, 2010, 9:00 AM to 12:45 PM: Workshop on Language, Compiler, and Architecture Support for GPGPU, Mainak Chaudhuri (IITK), Kalyan Muthukumar (Intel)
Location: Hall A, NSSC (near J N Tata Auditorium)

Saturday, January 9 and Sunday, January 10, 2010, 9:00 AM to 5:15 PM: Indo-US Workshop on Parallelism and the Future of High-Performance Computing
Location: J N Tata Auditorium

Tutorials

	Sat Jan 9, 2010	Sun Jan 10, 2010
09:00 to 12:30 pm	GCC for Parallelization Uday Khedker, IIT Mumbai, India Location: Satish Dhawan Auditorium	Multi-paradigm parallel programming with simple parallel languages Laxmikant V. Kale, UIUC, USA Location: Hall C	Parallelizing Irregular Applications through the Exploitation of Amorphous Data-Parallelism K. Pingali, The University of Texas at Austin, USA C. Cascaval, IBM Research, Yorktown Heights, NY, USA M. Kulkarni, Purdue University, USA Martin Burtscher, The University of Texas at Austin, USA Location: Satish Dhawan Auditorium	Using the Pilot Library: A Fresh Alternative to MPI for HPC Clusters Bill Gardner Gary Grewal John Carter School of Computer Science University of Guelph, Ontario, Canada Location: Hall C
01:30 to 05:00 pm	PIPS: An Interprocedural Extensible Source-to-Source Compiler Infrastructure for Code/Application Transformations and Instrumentations Francois Irigoin, Centre de Recherche en Informatique, MINES ParisTech, France Serge Guelton, Télécom Bretagne/Info/HPCAS, France Ronan Keryell, CSO, HPC Project, France Frédérique Silber-Chaussumier, Telecom Sud Paris, France Location: Satish Dhawan Auditorium	SaC and its auto-parallelising compiler sac2c Clemens Grelck, University of Amsterdam, Netherlands Stephan Herhut, University of Hertfordshire, Hatfield, UK Sven-Bodo Scholz, University of Hertfordshire, Hatfield, UK Location: Hall C	GPU Architecture, Programming and Performance Models Kishore Kothapalli, IIIT Hyderabad, India P. J. Narayanan, IIIT Hyderabad, India Suryakant Patidar, NVidia, Bangalore, India Location: Satish Dhawan Auditorium	Dynamic Verification of Message Passing and Threading G. Gopalakrishnan, University of Utah, USA Location: Hall C

Sat Jan 9, 2010

Sun Jan 10, 2010

09:00 to 12:30 pm

GCC for Parallelization
Uday Khedker, IIT Mumbai, India

Location: Satish Dhawan Auditorium

Multi-paradigm parallel programming with simple parallel languages
Laxmikant V. Kale, UIUC, USA

Location: Hall C

Parallelizing Irregular Applications through the Exploitation of Amorphous Data-Parallelism

K. Pingali, The University of Texas at Austin, USA
C. Cascaval, IBM Research, Yorktown Heights, NY, USA
M. Kulkarni, Purdue University, USA
Martin Burtscher, The University of Texas at Austin, USA

Location: Satish Dhawan Auditorium

Using the Pilot Library: A Fresh Alternative to MPI for HPC Clusters

Bill Gardner
Gary Grewal
John Carter

School of Computer Science
University of Guelph,
Ontario, Canada

Location: Hall C

01:30 to 05:00 pm

PIPS: An Interprocedural Extensible Source-to-Source Compiler Infrastructure for Code/Application Transformations and Instrumentations

Francois Irigoin, Centre de Recherche en Informatique, MINES ParisTech, France
Serge Guelton, Télécom Bretagne/Info/HPCAS, France
Ronan Keryell, CSO, HPC Project, France
Frédérique Silber-Chaussumier, Telecom Sud Paris, France

Location: Satish Dhawan Auditorium

SaC and its auto-parallelising compiler sac2c

Clemens Grelck, University of Amsterdam, Netherlands
Stephan Herhut, University of Hertfordshire, Hatfield, UK
Sven-Bodo Scholz, University of Hertfordshire, Hatfield, UK

Location: Hall C

GPU Architecture, Programming and Performance Models

Kishore Kothapalli, IIIT Hyderabad, India
P. J. Narayanan, IIIT Hyderabad, India
Suryakant Patidar, NVidia, Bangalore, India
Location: Satish Dhawan Auditorium

Dynamic Verification of Message Passing and Threading
G. Gopalakrishnan, University of Utah, USA

Location: Hall C